This invention relates to an integrated injection logic semiconductor device.
Recently, attention has been drawn to an integrated injection logic (abbreviated as "I.sup.2 L") semiconductor device which is of a simpler construction, can be produced with a higher yield and admits of denser integration than the transistor-transisgor logic (abbreviated as "TTL") semiconductor device. This I.sup.2 L (also known as "MTL") semiconductor device comprises on a semiconductor substrate a switching transistor and an injector for injecting minority carriers into the base region of the switching transistor. An input to the I.sup.2 L semiconductor device is controlled with the minority carriers, thereby injecting into the base region of the switching transistor effectively controlling an output from the I.sup.2 L semiconductor device, namely, the collector of a vertical transistor.
With the prior art I.sup.2 L semiconductor device, an N type semiconductor layer is formed on a semiconductor substrate by epitaxial growth. Mounted on said N type semiconductor layer are first and second P type regions in which boron is selectively diffused at the rate of 10.sup.17 to 10.sup.19 atoms/cm.sup.3. Diffused in the first P region is phosphorus at the rate of 10.sup.19 to 10.sup.21 atoms/cm.sup.3 to provide an N type region. With the conventional I.sup.2 L semiconductor device constructed as described above, the second P type region (emitter), N type semiconductor layer (base) and first P type region (collector) jointly constitute a lateral PNP type transistor. An N type semiconductor layer (emitter), first P type region (base) and N type region (collector) collectively form a vertical NPN type transistor. With the known I.sup.2 L semiconductor device, since that portion of the N type semiconductor layer which spreads in a depth direction between the first and second P type regions is concurrently used as the base of the lateral PNP type transistor, carriers from the injector to the base region are prevented from being effectively transported, that is a sufficient carrier transport efficiency is obtained. Moreover, the base of the PNP type transistor and the emitter of the NPN transistor occupy the same region. Therefore, if the efficiency of one of these transistors is improved, that of the other transistor will fall, preventing the overall efficiency of the semiconductor device from being elevated beyond a certain extent. Since the emitter of the vertical NPN transistor is formed of an N type semiconductor layer, it is necessary to decrease the concentration of an impurity diffused in the N type semiconductor layer from that of the first P type region used as the base of said vertical NPN transistor. This also leads to the low efficiency of said transistor.